Fundamentals of Digital Logic and Microcomputer Design

Ön Kapak
John Wiley & Sons, 8 Tem 2005 - 848 sayfa
Fundamentals of Digital Logic and Microcomputer Design, has long been hailed for its clear and simple presentation of the principles and basic tools required to design typical digital systems such as microcomputers. In this Fifth Edition, the author focuses on computer design at three levels: the device level, the logic level, and the system level. Basic topics are covered, such as number systems and Boolean algebra, combinational and sequential logic design, as well as more advanced subjects such as assembly language programming and microprocessor-based system design. Numerous examples are provided throughout the text.

Coverage includes:
  • Digital circuits at the gate and flip-flop levels
  • Analysis and design of combinational and sequential circuits
  • Microcomputer organization, architecture, and programming concepts
  • Design of computer instruction sets, CPU, memory, and I/O
  • System design features associated with popular microprocessors from Intel and Motorola
  • Future plans in microprocessor development
  • An instructor's manual, available upon request
Additionally, the accompanying CD-ROM, contains step-by-step procedures for installing and using Altera Quartus II software, MASM 6.11 (8086), and 68asmsim (68000), provides valuable simulation results via screen shots.

Fundamentals of Digital Logic and Microcomputer Design is an essential reference that will provide you with the fundamental tools you need to design typical digital systems.

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İçindekiler

1 INTRODUCTION TO DIGITAL SYSTEMS
1
2 NUMBER SYSTEMS AND CODES
23
3 BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES
53
4 COMBINATIONAL LOGIC DESIGN
99
5 SEQUENTIAL LOGIC DESIGN
135
6 MICROCOMPUTER ARCHITECTURE PROGRAMMING AND SYSTEM DESIGN CONCEPTS
185
7 DESIGN OF COMPUTER INSTRUCTION SET AND THE CPU
237
8 MEMORY IO AND PARALLEL PROCESSING
299
APPENDIX CMOTOROLA 68000 and SUPPORT CHIPS
649
APPENDIX D68000 EXECUTION TIMES
661
APPENDIX EINTEL 8086 AND SUPPORT CHIPS
671
APPENDIX F8086 INSTRUCTION SET REFERENCE DATA
677
APPENDIX G68000 INSTRUCTION SET
695
APPENDIX H8086 INSTRUCTION SET
701
APPENDIX IVERILOG
713
APPENDIX JVHDL
757

9 INTEL 8086
367
10 MOTOROLA MC68000
457
11 INTEL AND MOTOROLA 32 64BIT MICROPROCESSORS
543
APPENDIX AANSWERS TO SELECTED PROBLEMS
627
APPENDIX BGLOSSARY
633
BIBLIOGRAPHY
807
CREDITS
811
INDEX
813
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Sayfa 33 - NUL SOH STX ETX EOT ENQ ACK BEL BS HT LF VT FF CR SO SI OLE DC1 DC2 DC3 DC4 NAK SYN ETB CAN EM SUB ESC FS GS RS US...
Sayfa 420 - The request/grant pins are used by other local bus masters to force the processor to release the local bus at the end of the processor's current bus cycle. Each pin is bidirectional with RQ/GT0 having higher priority than RQ/GT,.
Sayfa 664 - D-10 indicates the number of clock periods required for the jump, lump-tosubroutine, load effective address, push effective address, and move multiple registers Instructions. The number of bus read and write cycles is shown In parenthesis as (r/w). Table D-10.
Sayfa 376 - Load effective address Load pointer using DS Load pointer using ES FLAG TRANSFER LAHF SAHF PUSHF POPF Load AH register from flags Store AH register in flags Push flags onto stack Pop flags off stack Table 2.2-1 Arithmetic Group.
Sayfa 429 - This functional configuration provides a means for communicating with a peripheral device or structure on a single 8-bit bus for both transmitting and receiving data (bidirectional bus I/O). "Handshaking" signals are provided to maintain proper bus flow discipline in a similar manner to MODE 1. Interrupt generation and enable/disable functions are also available. MODE 2 Basic Functional Definitions: • Used in Group A only. • One 8-bit, bi-directional bus Port (Port A) and a 5-bit control Port...
Sayfa 662 - D-6 indicates the number of clock periods for the single operand instructions. The number of bus read and write cycles is shown in parenthesis as (r/w). The number of clock periods and the number of read and write cycles must be added respectively to those of the effective address calculation where indicated. Table D-6.

Yazar hakkında (2005)

M. RAFIQUZZAMAN, PHD, is Professor of Electrical and Computer Engineering at California State Polytechnic University in Pomona. He is also the founder of Rafi Systems, Inc., a manufacturer of biomedical devices and a computer systems consulting firm in California. Recognized for his numerous books on microprocessors, which have been translated into Russian, Chinese, and Spanish, Dr. Rafiquzzaman is an advisor to the U.S. House Policy Committee's Technology Board, assisting members of Congress in developing and promoting technology in both public and private sectors.

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