Fundamentals of Digital Logic and Microcomputer DesignJohn Wiley & Sons, 8 Tem 2005 - 848 sayfa Fundamentals of Digital Logic and Microcomputer Design, has long been hailed for its clear and simple presentation of the principles and basic tools required to design typical digital systems such as microcomputers. In this Fifth Edition, the author focuses on computer design at three levels: the device level, the logic level, and the system level. Basic topics are covered, such as number systems and Boolean algebra, combinational and sequential logic design, as well as more advanced subjects such as assembly language programming and microprocessor-based system design. Numerous examples are provided throughout the text. Coverage includes:
Fundamentals of Digital Logic and Microcomputer Design is an essential reference that will provide you with the fundamental tools you need to design typical digital systems. |
İçindekiler
1 | |
23 | |
3 BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 53 |
4 COMBINATIONAL LOGIC DESIGN | 99 |
5 SEQUENTIAL LOGIC DESIGN | 135 |
6 MICROCOMPUTER ARCHITECTURE PROGRAMMING AND SYSTEM DESIGN CONCEPTS | 185 |
7 DESIGN OF COMPUTER INSTRUCTION SET AND THE CPU | 237 |
8 MEMORY IO AND PARALLEL PROCESSING | 299 |
APPENDIX CMOTOROLA 68000 and SUPPORT CHIPS | 649 |
APPENDIX D68000 EXECUTION TIMES | 661 |
APPENDIX EINTEL 8086 AND SUPPORT CHIPS | 671 |
APPENDIX F8086 INSTRUCTION SET REFERENCE DATA | 677 |
APPENDIX G68000 INSTRUCTION SET | 695 |
APPENDIX H8086 INSTRUCTION SET | 701 |
APPENDIX IVERILOG | 713 |
APPENDIX JVHDL | 757 |
9 INTEL 8086 | 367 |
10 MOTOROLA MC68000 | 457 |
11 INTEL AND MOTOROLA 32 64BIT MICROPROCESSORS | 543 |
APPENDIX AANSWERS TO SELECTED PROBLEMS | 627 |
APPENDIX BGLOSSARY | 633 |
807 | |
CREDITS | 811 |
813 | |
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16 bits 32 bits adder address register addressing mode arithmetic assembly language assembly language program binary number block Boolean bus cycle Bytes Coding Example cache chip complement configured contains contents data bus decimal decoder defined device downto DTACK EPROM execution external field figure first flip-flop floating-point full adder function gate hardware implemented initial input instruction set integer Intel interface interrupt K-map load logic diagram main memory mem/reg memory address memory location microcomputer microprocessor microprogram minterms module operand operation output overflow Pentium perform pins pointer port PowerPC processor program counter provides reset result RISC segment register sequence sequential circuit shown in Figure signal signed specified stack status register STD_LOGIC std_logic_vector stored subroutine subtraction transistor truth table typical unsigned vector Verilog VHDL word Write zero