Microprocessors: Theory and Applications (Intel and Motorola)Prentice Hall, 1992 - 468 sayfa |
Kitabın içinden
36 sonuçtan 1-3 arası sonuçlar
Sayfa 280
... Active LOW 5 Active LOW NRFD NDAC between the power meter and the HP9845 desktop com- puter . The RF power meter will be transferring infor- mation to the HP9845 . The power meter ( talker ) waits for the HP9845 ( lis- tener ) to raise ...
... Active LOW 5 Active LOW NRFD NDAC between the power meter and the HP9845 desktop com- puter . The RF power meter will be transferring infor- mation to the HP9845 . The power meter ( talker ) waits for the HP9845 ( lis- tener ) to raise ...
Sayfa 412
... active , the output buffers present data on the bus . These are the high order bits of the ROM address . They do not affect I / O oper- ations . Chip Enable Inputs : CE1 is active low and CE2 is active high . The 8355 can be accessed ...
... active , the output buffers present data on the bus . These are the high order bits of the ROM address . They do not affect I / O oper- ations . Chip Enable Inputs : CE1 is active low and CE2 is active high . The 8355 can be accessed ...
Sayfa 429
... Active CA1 ( CB1 ) Transition for Setting Interrupt Flag IRQA ( B ) 1 - ( bit 7 ) b1 = 0 : IRQA ( B ) 1 set by high ... active transition of CA1 ( CB1 ) ; Automa- tically cleared by MPU Read of Output Register A ( B ) . May also be ...
... Active CA1 ( CB1 ) Transition for Setting Interrupt Flag IRQA ( B ) 1 - ( bit 7 ) b1 = 0 : IRQA ( B ) 1 set by high ... active transition of CA1 ( CB1 ) ; Automa- tically cleared by MPU Read of Output Register A ( B ) . May also be ...
İçindekiler
MICROCOMPUTER ARCHITECTURE | 9 |
MICROCOMPUTER SOFTWARE | 49 |
Questions and Problems | 59 |
Telif Hakkı | |
15 diğer bölüm gösterilmiyor
Diğer baskılar - Tümünü görüntüle
Microprocessors: Theory and Applications (Intel and Motorola) Mohamed Rafiquzzaman Metin Parçacığı görünümü - 1992 |
Sık kullanılan terimler ve kelime öbekleri
16 bits 16-bit data A/D converter accumulator ADDRESS FIELD address register addressing mode assembly language binary buffer byte or word CALL CHARACTER chip circuit clock command contains contents coprocessor Courtesy of Intel data bus data field data register data transfer decoding decremented digits disp8 display DMA controller DTACK enable EPROM example execution flags affected functions GPIB hardware hexadecimal HIGH I/O port index register input instruction set INTA Intel Corporation interface INTR jump keyboard latched loads logic low byte mem/reg memory address memory location microcomputer microprocessor OP code operand operation output peripheral port 00 processor program counter register indirect RESET segment register service routine shown in Figure signal specified stack pointer status register stored subroutine TABLE tion typical vector voltage Write zero
Bu kitaba yapılan referanslar
Fundamentals of Digital Logic and Microcomputer Design Mohamed Rafiquzzaman Metin Parçacığı görünümü - 1999 |