Microprocessors: Theory and Applications (Intel and Motorola)Prentice Hall, 1992 - 468 sayfa |
Kitabın içinden
73 sonuçtan 1-3 arası sonuçlar
Sayfa 11
... clock systems Clock signal ( phase ) One clock cycle Phase 1 ( a ) L Phase 2 t ( b ) These microprocessors require an external crystal or an RC network to be connected at the appropriate micro- processor pins for setting the operating ...
... clock systems Clock signal ( phase ) One clock cycle Phase 1 ( a ) L Phase 2 t ( b ) These microprocessors require an external crystal or an RC network to be connected at the appropriate micro- processor pins for setting the operating ...
Sayfa 145
... clock period of a bus cycle ( read or write cycle ) , the entire 20- bit address is available on these lines . During all other clock cycles for memory and I / O operations , AD15 - ADO contain the 16 - bit data and S3 , S4 , S5 , and S ...
... clock period of a bus cycle ( read or write cycle ) , the entire 20- bit address is available on these lines . During all other clock cycles for memory and I / O operations , AD15 - ADO contain the 16 - bit data and S3 , S4 , S5 , and S ...
Sayfa 188
... Clock pulse width tcL 55 125 45 125 35 125 ns tcH 55 125 45 125 35 125 Rise and fall times tcr 10 10 5 ns tcf - 10 10 5 2.0 V tcL tcyc 0.8 V tcr tct oscillator or by designing an external circuit . Figure 6-9 shows a simple oscillator ...
... Clock pulse width tcL 55 125 45 125 35 125 ns tcH 55 125 45 125 35 125 Rise and fall times tcr 10 10 5 ns tcf - 10 10 5 2.0 V tcL tcyc 0.8 V tcr tct oscillator or by designing an external circuit . Figure 6-9 shows a simple oscillator ...
İçindekiler
MICROCOMPUTER ARCHITECTURE | 9 |
MICROCOMPUTER SOFTWARE | 49 |
Questions and Problems | 59 |
Telif Hakkı | |
15 diğer bölüm gösterilmiyor
Diğer baskılar - Tümünü görüntüle
Microprocessors: Theory and Applications (Intel and Motorola) Mohamed Rafiquzzaman Metin Parçacığı görünümü - 1992 |
Sık kullanılan terimler ve kelime öbekleri
16 bits 16-bit data A/D converter accumulator ADDRESS FIELD address register addressing mode assembly language binary buffer byte or word CALL CHARACTER chip circuit clock command contains contents coprocessor Courtesy of Intel data bus data field data register data transfer decoding decremented digits disp8 display DMA controller DTACK enable EPROM example execution flags affected functions GPIB hardware hexadecimal HIGH I/O port index register input instruction set INTA Intel Corporation interface INTR jump keyboard latched loads logic low byte mem/reg memory address memory location microcomputer microprocessor OP code operand operation output peripheral port 00 processor program counter register indirect RESET segment register service routine shown in Figure signal specified stack pointer status register stored subroutine TABLE tion typical vector voltage Write zero
Bu kitaba yapılan referanslar
Fundamentals of Digital Logic and Microcomputer Design Mohamed Rafiquzzaman Metin Parçacığı görünümü - 1999 |