Microprocessors: Theory and Applications (Intel and Motorola)Prentice Hall, 1992 - 468 sayfa |
Kitabın içinden
32 sonuçtan 1-3 arası sonuçlar
Sayfa 125
... cleared to zero ; mem uses DS as segment register reg and data can be 8- or 16 - bit ; no result provided ; all flags affected with CF and OF cleared to zero ; reg cannot be segment register Causes microprocessor to enter wait state if ...
... cleared to zero ; mem uses DS as segment register reg and data can be 8- or 16 - bit ; no result provided ; all flags affected with CF and OF cleared to zero ; reg cannot be segment register Causes microprocessor to enter wait state if ...
Sayfa 429
... cleared by MPU Read of Output Register A ( 8 ) May also be cleared by hardware Reset . CA2 ( CB2 ) Established as Output ( b5 = 1 ) : IRQA ( 8 ) 2 = 0 , not affected by CA2 ( CB2 ) transitions . Determines Whether Data Direction ...
... cleared by MPU Read of Output Register A ( 8 ) May also be cleared by hardware Reset . CA2 ( CB2 ) Established as Output ( b5 = 1 ) : IRQA ( 8 ) 2 = 0 , not affected by CA2 ( CB2 ) transitions . Determines Whether Data Direction ...
Sayfa 441
... cleared to zero Data can be 8- or 16 - bit ; reg cannot be segment register ; all flags affected with OF and CF cleared to zero Finds 1's comple- NOT NOT reg [ reg ] - [ reg ] ' Register NOT BX ( 1's com- plement ) ment of a register ...
... cleared to zero Data can be 8- or 16 - bit ; reg cannot be segment register ; all flags affected with OF and CF cleared to zero Finds 1's comple- NOT NOT reg [ reg ] - [ reg ] ' Register NOT BX ( 1's com- plement ) ment of a register ...
İçindekiler
MICROCOMPUTER ARCHITECTURE | 9 |
MICROCOMPUTER SOFTWARE | 49 |
Questions and Problems | 59 |
Telif Hakkı | |
15 diğer bölüm gösterilmiyor
Sık kullanılan terimler ve kelime öbekleri
16 bits 16-bit data A/D converter accumulator ADDRESS FIELD address register addressing mode assembly language binary buffer byte or word CALL CHARACTER chip circuit clock command contains contents coprocessor Courtesy of Intel data bus data field data register data transfer decoding decremented digits disp8 display DMA controller DTACK enable EPROM example execution flags affected functions GPIB hardware hexadecimal HIGH I/O port index register input instruction set INTA Intel Corporation interface INTR jump keyboard latched loads logic low byte mem/reg memory address memory location microcomputer microprocessor OP code operand operation output peripheral port 00 processor program counter register indirect RESET segment register service routine shown in Figure signal specified stack pointer status register stored subroutine TABLE tion typical vector voltage Write zero
Bu kitaba yapılan referanslar
Fundamentals of Digital Logic and Microcomputer Design Mohamed Rafiquzzaman Metin Parçacığı görünümü - 1999 |