Microprocessors: Theory and Applications (Intel and Motorola)Prentice Hall, 1992 - 468 sayfa |
Kitabın içinden
38 sonuçtan 1-3 arası sonuçlar
Sayfa 56
... implement subroutine nesting , we need to retrieve the return addresses exactly in the reverse order in which they are saved ... Implementation of a two - level subroutine nesting return address MR , and , therefore , control will not be ...
... implement subroutine nesting , we need to retrieve the return addresses exactly in the reverse order in which they are saved ... Implementation of a two - level subroutine nesting return address MR , and , therefore , control will not be ...
Sayfa 140
... implementation in an 8086 - based system . The 8089 also has the capability of supporting graphic display functions ... implemented by Intel as part of the execution of the divide instruction . When the TF ( trap flag ) is set by an ...
... implementation in an 8086 - based system . The 8089 also has the capability of supporting graphic display functions ... implemented by Intel as part of the execution of the divide instruction . When the TF ( trap flag ) is set by an ...
Sayfa 214
... implemented more like an extension of the architecture as in mainframe and minicomputer CPUs . Caching or memory ... implementation - a route taken by both the Intel 80386/80486 and the Motorola 68030/68040 . 7-2 INTEL 80386 The ...
... implemented more like an extension of the architecture as in mainframe and minicomputer CPUs . Caching or memory ... implementation - a route taken by both the Intel 80386/80486 and the Motorola 68030/68040 . 7-2 INTEL 80386 The ...
İçindekiler
MICROCOMPUTER ARCHITECTURE | 9 |
MICROCOMPUTER SOFTWARE | 49 |
Questions and Problems | 59 |
Telif Hakkı | |
15 diğer bölüm gösterilmiyor
Sık kullanılan terimler ve kelime öbekleri
16 bits 16-bit data A/D converter accumulator ADDRESS FIELD address register addressing mode assembly language binary buffer byte or word CALL CHARACTER chip circuit clock command contents coprocessor data bus data field data register data transfer decoding decremented digits disp8 display DMA controller DTACK enable EPROM example execution flags affected functions GPIB hardware hexadecimal HIGH I/O port index register input instruction set INTA Intel Corporation interface INTR jump keyboard latched loads logic low byte mem/reg memory address memory location memory-mapped I/O microcomputer microprocessor OP code operand operation output peripheral port 00 processor program counter register indirect RESET segment register service routine shown in Figure signal specified stack pointer status register stored subroutine TABLE tion typical vector voltage Write zero
Bu kitaba yapılan referanslar
Fundamentals of Digital Logic and Microcomputer Design Mohamed Rafiquzzaman Metin Parçacığı görünümü - 1999 |