Microprocessors: Theory and Applications (Intel and Motorola)Prentice Hall, 1992 - 468 sayfa |
Kitabın içinden
43 sonuçtan 1-3 arası sonuçlar
Sayfa 123
... Shift arithmetic left byte or CL word by shift count on CL Operation same as SAL mem / reg , 1 ; CL contains shift count up to 255 ; zero and negative shifts illegal ; [ CL ] used as shift count when Continued . TABLE 5-1 Summary of ...
... Shift arithmetic left byte or CL word by shift count on CL Operation same as SAL mem / reg , 1 ; CL contains shift count up to 255 ; zero and negative shifts illegal ; [ CL ] used as shift count when Continued . TABLE 5-1 Summary of ...
Sayfa 124
... Shift logical left once byte or word in mem / reg Shift logical left byte or word in mem / reg by shift count in CL Shift right logical once byte or word in mem / reg word in mem / reg by [ CL ] CF - 1 SUB mem / reg 1 , mem / reg 2 SUB ...
... Shift logical left once byte or word in mem / reg Shift logical left byte or word in mem / reg by shift count in CL Shift right logical once byte or word in mem / reg word in mem / reg by [ CL ] CF - 1 SUB mem / reg 1 , mem / reg 2 SUB ...
Sayfa 179
... Shift and Rotate Instructions Instruction Size ASL , Dx , Dy B , W , L TABLE 6-10 68000 Shift and Rotate Instructions ( cont . ) Operation Instruction Size LSL Dx , Dy B , W , L Dy 0 J Operation Dy 0 Shift [ Dy ] by the number of times ...
... Shift and Rotate Instructions Instruction Size ASL , Dx , Dy B , W , L TABLE 6-10 68000 Shift and Rotate Instructions ( cont . ) Operation Instruction Size LSL Dx , Dy B , W , L Dy 0 J Operation Dy 0 Shift [ Dy ] by the number of times ...
İçindekiler
MICROCOMPUTER ARCHITECTURE | 9 |
MICROCOMPUTER SOFTWARE | 49 |
Questions and Problems | 59 |
Telif Hakkı | |
15 diğer bölüm gösterilmiyor
Sık kullanılan terimler ve kelime öbekleri
16 bits 16-bit data A/D converter accumulator ADDRESS FIELD address register addressing mode assembly language binary buffer byte or word CALL CHARACTER chip circuit clock command contents coprocessor data bus data field data register data transfer decoding decremented digits disp8 display DMA controller DTACK enable EPROM example execution flags affected functions GPIB hardware hexadecimal HIGH I/O port index register input instruction set INTA Intel Corporation interface INTR jump keyboard latched loads logic low byte mem/reg memory address memory location memory-mapped I/O microcomputer microprocessor OP code operand operation output peripheral port 00 processor program counter register indirect RESET segment register service routine shown in Figure signal specified stack pointer status register stored subroutine TABLE tion typical vector voltage Write zero
Bu kitaba yapılan referanslar
Fundamentals of Digital Logic and Microcomputer Design Mohamed Rafiquzzaman Metin Parçacığı görünümü - 1999 |