Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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36 sonuçtan 1-3 arası sonuçlar
Sayfa 410
... CALL instructions can be intersegment and intrasegment . For example , CALL DWORD PTR [ BX ] pushes CS and IP onto stack and loads IP and CS with the contents of four consecutive locations pointed to by BX . CALL BX , on the other hand ...
... CALL instructions can be intersegment and intrasegment . For example , CALL DWORD PTR [ BX ] pushes CS and IP onto stack and loads IP and CS with the contents of four consecutive locations pointed to by BX . CALL BX , on the other hand ...
Sayfa 432
... call this subroutine , store the result in two consecutive memory words , and stop . Assume SI and DI contain ... CALL FAR PTR MULTI ; Call MULTI subroutine MOV [ BX ] , DX ; Store high word of result 13 001B 89 57 02 MOV [ BX + 2 432 ...
... call this subroutine , store the result in two consecutive memory words , and stop . Assume SI and DI contain ... CALL FAR PTR MULTI ; Call MULTI subroutine MOV [ BX ] , DX ; Store high word of result 13 001B 89 57 02 MOV [ BX + 2 432 ...
Sayfa 721
... call statements take the maximum execution time . A RISC program has more call statements , since the complex instructions available in CISC are subroutines in RISC . The RISC register window scheme strives to make the call operation as ...
... call statements take the maximum execution time . A RISC program has more call statements , since the complex instructions available in CISC are subroutines in RISC . The RISC register window scheme strives to make the call operation as ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero