Fundamentals of Digital Logic and Microcomputer Design |
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Sayfa 82
A signal is " active high " if it performs the required function when HIGH ( H = 1 ) .
An " active low " signal , on the other hand , performs the required function when
LOW ( L = 0 ) . A signal is said to be asserted when it is active . A signal is ...
A signal is " active high " if it performs the required function when HIGH ( H = 1 ) .
An " active low " signal , on the other hand , performs the required function when
LOW ( L = 0 ) . A signal is said to be asserted when it is active . A signal is ...
Sayfa 163
Note that OR outputs generate active HIGH whereas NORS provide active LOW
outputs . On the other hand , OR - NOR gates include both active HIGH and
active LOW outputs . For example , the PAL16L8 is a 20 - pin chip with a
maximum of ...
Note that OR outputs generate active HIGH whereas NORS provide active LOW
outputs . On the other hand , OR - NOR gates include both active HIGH and
active LOW outputs . For example , the PAL16L8 is a 20 - pin chip with a
maximum of ...
Sayfa 173
An SR latch can be built from NAND gates with active - low set and reset inputs .
Figure 5 . 2 shows the NAND gate implementation of an SR latch . The SR latch
with active low inputs ( S and R ) will store a 1 ( Q = 1 and = 0 ) when the S input ...
An SR latch can be built from NAND gates with active - low set and reset inputs .
Figure 5 . 2 shows the NAND gate implementation of an SR latch . The SR latch
with active low inputs ( S and R ) will store a 1 ( Q = 1 and = 0 ) when the S input ...
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NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
SEQUENTIAL LOGIC DESIGN | 171 |
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addition address register addressing modes assembly asserted Assume base basic binary bits block branch byte cache called carry chip circuit clear clock combinational complement condition connected consider contains contents converter counter cycle decoder determine device diagram digits displacement effective enable example exception execution external field Figure flags flip-flop four function gate hardware HIGH immediate implemented indicates indirect Initialize input instruction interface interrupt K-map language lines loaded logic main memory means memory microcomputer microprocessor mode MOVE multiplication Note obtained offset operand operation output Pentium perform pins placed pointer port processing processor reset result segment sequence shift shown in Figure shows signal signed specified stack starting stored transfer typical unit vector Write zero