Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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Sayfa 50
... addition . The corresponding decimal additions are also included . 010 ( 2 ) +011 ( 3 ) 101 ( 5 ) 111 carry 101.11 ( 5.75 ) +011.10 ( 3.50 ) 1 001.01 ( 9.25 ) final carry Addition is the most important arithmetic operation in ...
... addition . The corresponding decimal additions are also included . 010 ( 2 ) +011 ( 3 ) 101 ( 5 ) 111 carry 101.11 ( 5.75 ) +011.10 ( 3.50 ) 1 001.01 ( 9.25 ) final carry Addition is the most important arithmetic operation in ...
Sayfa 60
... addition process is straightfor- ward and is actually the same as binary addition . Now , consider the addition of 8 and 4 in BCD : 8 +4 12 0000 0000 0000 1000 0100 1100 invalid code group for BCD The sum 1100 does not exist in BCD code ...
... addition process is straightfor- ward and is actually the same as binary addition . Now , consider the addition of 8 and 4 in BCD : 8 +4 12 0000 0000 0000 1000 0100 1100 invalid code group for BCD The sum 1100 does not exist in BCD code ...
Sayfa 62
... addition and subtraction operations using the twos complement number representation . This can be accomplished by storing the 16 - bit numbers each in two 8 - bit memory locations . Addition or subtraction of the two 16 - bit numbers is ...
... addition and subtraction operations using the twos complement number representation . This can be accomplished by storing the 16 - bit numbers each in two 8 - bit memory locations . Addition or subtraction of the two 16 - bit numbers is ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero