Fundamentals of Digital Logic and Microcomputer Design |
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77 sonuçtan 1-3 arası sonuçlar
Sayfa 137
Next , consider addition of two 4 - bit numbers as follows : Os 18 ose Carries 0 0
1 0 + o lo u lo Sum = 0 1 0 0 Final Carry = 0 % This addition of two bits will
generate a sum and a carry . The carry may be 0 or 1 . Also , there will be no
previous ...
Next , consider addition of two 4 - bit numbers as follows : Os 18 ose Carries 0 0
1 0 + o lo u lo Sum = 0 1 0 0 Final Carry = 0 % This addition of two bits will
generate a sum and a carry . The carry may be 0 or 1 . Also , there will be no
previous ...
Sayfa 307
carry is propagated serially through each full adder . This hardware can be
cascaded to obtain a 16 - bit CPA , as shown in Figure 7 . 12 ; co = 0 or 1 for
multiprecision addition . Although the design of an n - bit CPA is straightforward ,
the carry ...
carry is propagated serially through each full adder . This hardware can be
cascaded to obtain a 16 - bit CPA , as shown in Figure 7 . 12 ; co = 0 or 1 for
multiprecision addition . Although the design of an n - bit CPA is straightforward ,
the carry ...
Sayfa 311
In fact , this system can be speeded up further by employing another 4 - bit CLC
and eliminating the carry propagation between the 4 - bit CLA blocks . For this
purpose , the gi and pi outputs generated by the 4 - bit CLA are used . This
design ...
In fact , this system can be speeded up further by employing another 4 - bit CLC
and eliminating the carry propagation between the 4 - bit CLA blocks . For this
purpose , the gi and pi outputs generated by the 4 - bit CLA are used . This
design ...
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NUMBER SYSTEMS AND CODES | 31 |
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SEQUENTIAL LOGIC DESIGN | 171 |
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addition address register addressing modes assembly asserted Assume base basic binary bits block branch byte cache called carry chip circuit clear clock combinational complement condition connected consider contains contents converter counter cycle decoder determine device diagram digits displacement effective enable example exception execution external field Figure flags flip-flop four function gate hardware HIGH immediate implemented indicates indirect Initialize input instruction interface interrupt K-map language lines loaded logic main memory means memory microcomputer microprocessor mode MOVE multiplication Note obtained offset operand operation output Pentium perform pins placed pointer port processing processor reset result segment sequence shift shown in Figure shows signal signed specified stack starting stored transfer typical unit vector Write zero