Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
Kitabın içinden
76 sonuçtan 1-3 arası sonuçlar
Sayfa 2
... chip . Along with the microprocessor chip , appropriate memory and I / O chips can be used to design a microcomputer . The pins on each one of these chips are then connected to the proper lines on the system bus , which consists of ...
... chip . Along with the microprocessor chip , appropriate memory and I / O chips can be used to design a microcomputer . The pins on each one of these chips are then connected to the proper lines on the system bus , which consists of ...
Sayfa 22
... chips . The MSI IC , on the other hand , includes from 11 to up to 100 gates in a single chip . The MSI chips normally perform specific functions such as add . The LSI IC contains more than 100 to approximately 1000 gates . Digital ...
... chips . The MSI IC , on the other hand , includes from 11 to up to 100 gates in a single chip . The MSI chips normally perform specific functions such as add . The LSI IC contains more than 100 to approximately 1000 gates . Digital ...
Sayfa 354
... chip selects . In particular , the address lines A10 and A select the RAM chips I and II respectively . Similarly , the address lines A12 and A13 select the RAM chips III and IV respec- tively . A1s and A14 are don't cares and are ...
... chip selects . In particular , the address lines A10 and A select the RAM chips I and II respectively . Similarly , the address lines A12 and A13 select the RAM chips III and IV respec- tively . A1s and A14 are don't cares and are ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
13 diğer bölüm gösterilmiyor
Sık kullanılan terimler ve kelime öbekleri
16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero