Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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67 sonuçtan 1-3 arası sonuçlar
Sayfa 339
... condition select multiplexer . It selects one of the external conditions based on the contents of the condition select field of the microin- struction fetched into the CWR . In Figure 7.45 , a 2 - bit condition select field is required ...
... condition select multiplexer . It selects one of the external conditions based on the contents of the condition select field of the microin- struction fetched into the CWR . In Figure 7.45 , a 2 - bit condition select field is required ...
Sayfa 340
... condition select field is 00. The contents of the branch in this case filled with 000. In the control function field , two micro - operations , Co and C1 , are activated . Therefore , both Co and C1 are set to 1 ; C2 through C , are set ...
... condition select field is 00. The contents of the branch in this case filled with 000. In the control function field , two micro - operations , Co and C1 , are activated . Therefore , both Co and C1 are set to 1 ; C2 through C , are set ...
Sayfa 647
... Condition Instructions The new trap condition ( TRAPCC ) instruction allows a conditional trap exception on any of the condition codes shown in Table 10.22 . These are the same conditions that are allowed for the set - on - condition ...
... Condition Instructions The new trap condition ( TRAPCC ) instruction allows a conditional trap exception on any of the condition codes shown in Table 10.22 . These are the same conditions that are allowed for the set - on - condition ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero