Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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Sayfa 442
... connected to LOW while the AEN1 and AEN2 are connected to HIGH , which will permanently disable this function . In multiprocessor systems , these signals are used to control access over the system bus by several 8086's . The 8284 ASYNC ...
... connected to LOW while the AEN1 and AEN2 are connected to HIGH , which will permanently disable this function . In multiprocessor systems , these signals are used to control access over the system bus by several 8086's . The 8284 ASYNC ...
Sayfa 453
... connected to the 2732 OE pins . The 8086 CE can be connected to either ground or an unused 8086 address pin . Note that both 2732's are enabled for all data reads ; the odd 2732 places data on the demultiplexed 8086 D - D1s pins while ...
... connected to the 2732 OE pins . The 8086 CE can be connected to either ground or an unused 8086 address pin . Note that both 2732's are enabled for all data reads ; the odd 2732 places data on the demultiplexed 8086 D - D1s pins while ...
Sayfa 528
... connected to bit 0 of ports A and B based on the input conditions set by switches connected at bit 1 of ports A and B. The I / O conditions are as follows : If the input to bit 1 of port A is HIGH and the input to bit 1 of port B is low ...
... connected to bit 0 of ports A and B based on the input conditions set by switches connected at bit 1 of ports A and B. The I / O conditions are as follows : If the input to bit 1 of port A is HIGH and the input to bit 1 of port B is low ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero