Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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Sayfa 131
... converter via four switches as was discussed in Chapter 1. A combina- tional circuit can be designed for the code converter that will translate each digit entered using four bits into seven output bits ( one bit for each segment ) of ...
... converter via four switches as was discussed in Chapter 1. A combina- tional circuit can be designed for the code converter that will translate each digit entered using four bits into seven output bits ( one bit for each segment ) of ...
Sayfa 371
... converter shown in Figure 8.17 . This A / D converter transforms an analog voltage V , into an 8 - bit binary output at pins D - D 。. A pulse at the START conversion pin initiates the conver- sion . This drives the BUSY signal LOW ...
... converter shown in Figure 8.17 . This A / D converter transforms an analog voltage V , into an 8 - bit binary output at pins D - D 。. A pulse at the START conversion pin initiates the conver- sion . This drives the BUSY signal LOW ...
Sayfa 372
... converter D3 D2 D1 Output enable Do FIGURE 8.17 A / D converter The concept of conditional I / O can be demonstrated by interfacing the A / D converter to a typical processor . Figure 8.18 shows such an interfacing example . The user ...
... converter D3 D2 D1 Output enable Do FIGURE 8.17 A / D converter The concept of conditional I / O can be demonstrated by interfacing the A / D converter to a typical processor . Figure 8.18 shows such an interfacing example . The user ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero