Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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Sayfa 13
... defined as the maximum number of inputs that can be connected to the output of a gate . It is expressed as a number . The output of a gate is normally connected to the inputs of other similar gates . Typical fan - out for TTL is 10. On ...
... defined as the maximum number of inputs that can be connected to the output of a gate . It is expressed as a number . The output of a gate is normally connected to the inputs of other similar gates . Typical fan - out for TTL is 10. On ...
Sayfa 269
... defined . For example , the EQU statement BEGIN EQU START will generate an error unless START is defined previously with a numeric value . Define Byte ( DB ) The pseudo - instruction DB is usually used to set a memory location to ...
... defined . For example , the EQU statement BEGIN EQU START will generate an error unless START is defined previously with a numeric value . Define Byte ( DB ) The pseudo - instruction DB is usually used to set a memory location to ...
Sayfa 368
... defined as follows : 7 6 5 0 0 1 4 3 2 1 0 1 0 1 0 0 Bit position Data - direction register V / O port In this example , because 34H ( 0011 0100 ) is sent as an output into the data - direction register , bits 0 , 1 , 3 , 6 , and 7 of ...
... defined as follows : 7 6 5 0 0 1 4 3 2 1 0 1 0 1 0 0 Bit position Data - direction register V / O port In this example , because 34H ( 0011 0100 ) is sent as an output into the data - direction register , bits 0 , 1 , 3 , 6 , and 7 of ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero