Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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Sayfa 231
... elements so that information transfer between the microprocessor and any of the other elements can take place . In the ... element , it is called a READ operation , and data is being read from a selected memory location . In the address ...
... elements so that information transfer between the microprocessor and any of the other elements can take place . In the ... element , it is called a READ operation , and data is being read from a selected memory location . In the address ...
Sayfa 543
... element ( 0 being the first element ) in table 2 to the low 16 bits of register DO , the instruction MOVE.W $ 06 ( A2 , D1.W ) , DO can be used , where [ A2 ] the starting address of the table with the lowest address ( = 00200016 in ...
... element ( 0 being the first element ) in table 2 to the low 16 bits of register DO , the instruction MOVE.W $ 06 ( A2 , D1.W ) , DO can be used , where [ A2 ] the starting address of the table with the lowest address ( = 00200016 in ...
Sayfa 765
... elements . Each processing element has its own small local memory unit . The operation of all the processing elements is under the control of a central control unit ( CCU ) . Typically , the CCU reads an instruction from the common ...
... elements . Each processing element has its own small local memory unit . The operation of all the processing elements is under the control of a central control unit ( CCU ) . Typically , the CCU reads an instruction from the common ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero