Fundamentals of Digital Logic and Microcomputer Design |
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69 sonuçtan 1-3 arası sonuçlar
Sayfa 374
B # $ 81 , PORTA send start pulse to A / D and HIGH to OUTPUT ENABLE MOVE
. B # $ 01 , PORTA CLR . W DO clear 16 - bit register DO to O BEGIN MOVE . W
D1 , D2 The extensions . B and . W represent byte and word operations .
B # $ 81 , PORTA send start pulse to A / D and HIGH to OUTPUT ENABLE MOVE
. B # $ 01 , PORTA CLR . W DO clear 16 - bit register DO to O BEGIN MOVE . W
D1 , D2 The extensions . B and . W represent byte and word operations .
Sayfa 507
In the first bus cycle , the 80386 enables BE2 # and BE3 # , and writes the
contents of low 16 - bits of EAX into addresses ... D / C # , and ADS # pins of the
80386 are used to generate four byte enable signals , EO , E1 , E2 , and E3 . The
80386 ...
In the first bus cycle , the 80386 enables BE2 # and BE3 # , and writes the
contents of low 16 - bits of EAX into addresses ... D / C # , and ADS # pins of the
80386 are used to generate four byte enable signals , EO , E1 , E2 , and E3 . The
80386 ...
Sayfa 669
25 K - maps for Enable Signals for Memory ( continued ) Sizo 200 _ 01 11 10
१२ - DBBE3 - DBBE3 00 ODIO К - МАР , 11 MIDT 10 10 10 E33 = Aj · Ao + sizi •
Āy . A + SIZISIZO . Ā , + SIZI SIZO AL DJ A12 = 0 SIZO siz ) Acco _ 01 SIZI SIZO
DS ...
25 K - maps for Enable Signals for Memory ( continued ) Sizo 200 _ 01 11 10
१२ - DBBE3 - DBBE3 00 ODIO К - МАР , 11 MIDT 10 10 10 E33 = Aj · Ao + sizi •
Āy . A + SIZISIZO . Ā , + SIZI SIZO AL DJ A12 = 0 SIZO siz ) Acco _ 01 SIZI SIZO
DS ...
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NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
SEQUENTIAL LOGIC DESIGN | 171 |
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addition address register addressing modes assembly asserted Assume base basic binary bits block branch byte cache called carry chip circuit clear clock combinational complement condition connected consider contains contents converter counter cycle decoder determine device diagram digits displacement effective enable example exception execution external field Figure flags flip-flop four function gate hardware HIGH immediate implemented indicates indirect Initialize input instruction interface interrupt K-map language lines loaded logic main memory means memory microcomputer microprocessor mode MOVE multiplication Note obtained offset operand operation output Pentium perform pins placed pointer port processing processor reset result segment sequence shift shown in Figure shows signal signed specified stack starting stored transfer typical unit vector Write zero