Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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34 sonuçtan 1-3 arası sonuçlar
Sayfa 107
... expression of the complement of the function ( ) . By taking the complement of F , the simplified expression for the function , f , can be obtained . Example 3.12 Simplify the Boolean function f ( A , B , C , D ) = Σm ( 0 , 1 , 4 , 5 ...
... expression of the complement of the function ( ) . By taking the complement of F , the simplified expression for the function , f , can be obtained . Example 3.12 Simplify the Boolean function f ( A , B , C , D ) = Σm ( 0 , 1 , 4 , 5 ...
Sayfa 108
... expression as a sum of minterms . The procedure is similar for simplifying a function expressed in product - of - sums ( maxterms ) . To represent a function expressed in product - of - sums in the K - map , the complement of the ...
... expression as a sum of minterms . The procedure is similar for simplifying a function expressed in product - of - sums ( maxterms ) . To represent a function expressed in product - of - sums in the K - map , the complement of the ...
Sayfa 167
... expression for F ( A , B , C , D ) . Derive the truth table . Determine the simplified expression for F ( A , B , C , D ) using a K - map . ( d ) Draw the logic diagram for the simplified expression using NAND gates . Determine the ...
... expression for F ( A , B , C , D ) . Derive the truth table . Determine the simplified expression for F ( A , B , C , D ) using a K - map . ( d ) Draw the logic diagram for the simplified expression using NAND gates . Determine the ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand operation output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero