Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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83 sonuçtan 1-3 arası sonuçlar
Sayfa 101
... Four - Variable K - map A four - variable K - map , depicted in Figure 3.33 , contains 16 squares because there are 16 minterms . Figure 3.33 ( a ) includes four literals in each square . Figure 3.33 ( b ) lists each minterm in its ...
... Four - Variable K - map A four - variable K - map , depicted in Figure 3.33 , contains 16 squares because there are 16 minterms . Figure 3.33 ( a ) includes four literals in each square . Figure 3.33 ( b ) lists each minterm in its ...
Sayfa 131
... four bits into seven output bits ( one bit for each segment ) of the display . In this case , the code converter has four inputs and seven outputs . This code converter is commonly known as a " BCD to seven - segment decoder . " With ...
... four bits into seven output bits ( one bit for each segment ) of the display . In this case , the code converter has four inputs and seven outputs . This code converter is commonly known as a " BCD to seven - segment decoder . " With ...
Sayfa 477
... four - digit display should be output first , then the next digit code , and so on . The program outputs to the displays are so fast that visually all four digits will appear on the display simul- taneously . If the displays are entered ...
... four - digit display should be output first , then the next digit code , and so on . The program outputs to the displays are so fast that visually all four digits will appear on the display simul- taneously . If the displays are entered ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand operation output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero