Fundamentals of Digital Logic and Microcomputer Design |
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37 sonuçtan 1-3 arası sonuçlar
Sayfa 504
W / R # , D / C # , MIO # , and LOCK # output pins specify the type of bus cycle
being performed by the 80386 . W / R # pin , when HIGH , identifies write cycle
and , when LOW , indicates read cycle . D / C # pin , when HIGH , identifies data
cycle ...
W / R # , D / C # , MIO # , and LOCK # output pins specify the type of bus cycle
being performed by the 80386 . W / R # pin , when HIGH , identifies write cycle
and , when LOW , indicates read cycle . D / C # pin , when HIGH , identifies data
cycle ...
Sayfa 556
Note that a zero value of [ TEST ] indicates that the shared RAM is free for use ,
and the Z bit indicates this after the TAS is executed . In each of the instruction
sequences , after a data transfer using the MOVE instruction , [ TEST ] is cleared
to ...
Note that a zero value of [ TEST ] indicates that the shared RAM is free for use ,
and the Z bit indicates this after the TAS is executed . In each of the instruction
sequences , after a data transfer using the MOVE instruction , [ TEST ] is cleared
to ...
Sayfa 661
... bus cycle 3 - bit function code used to identify the address space of each bus
cycle Indicates the number of bytes remaining to be transferred for this cycle ;
these signals , together with AO and Al , define the active sections of the data bus
.
... bus cycle 3 - bit function code used to identify the address space of each bus
cycle Indicates the number of bytes remaining to be transferred for this cycle ;
these signals , together with AO and Al , define the active sections of the data bus
.
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NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
SEQUENTIAL LOGIC DESIGN | 171 |
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addition address register addressing modes assembly asserted Assume base basic binary bits block branch byte cache called carry chip circuit clear clock combinational complement condition connected consider contains contents converter counter cycle decoder determine device diagram digits displacement effective enable example exception execution external field Figure flags flip-flop four function gate hardware HIGH immediate implemented indicates indirect Initialize input instruction interface interrupt K-map language lines loaded logic main memory means memory microcomputer microprocessor mode MOVE multiplication Note obtained offset operand operation output Pentium perform pins placed pointer port processing processor reset result segment sequence shift shown in Figure shows signal signed specified stack starting stored transfer typical unit vector Write zero