Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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Sayfa 403
... reg / mem AAA ASCII adjust for addition DAA SUB a , b SBB a , b DEC reg / mem Increment byte or word by one Decimal adjust [ AL ] , to be used after ADD or ADC Subtract byte or word Subtraction Subtract byte or word with borrow ...
... reg / mem AAA ASCII adjust for addition DAA SUB a , b SBB a , b DEC reg / mem Increment byte or word by one Decimal adjust [ AL ] , to be used after ADD or ADC Subtract byte or word Subtraction Subtract byte or word with borrow ...
Sayfa 404
... mem / reg , mem / reg . This instruction adds data with carry from reg to reg , from reg to mem , or from mem to reg . There is no ADC mem , mem instruction . For example , if [ AX ] = 002016 , [ BX ] = 030016 , CF = 1 , [ DS ] = 202016 ...
... mem / reg , mem / reg . This instruction adds data with carry from reg to reg , from reg to mem , or from mem to reg . There is no ADC mem , mem instruction . For example , if [ AX ] = 002016 , [ BX ] = 030016 , CF = 1 , [ DS ] = 202016 ...
Sayfa 407
... mem / reg , CNT SHR / SAR mem / reg , CNT ROL mem / reg , CNT ROR mem / reg , CNT RCL mem / reg , CNT RCR mem / reg , CNT Logicals NOT byte or word AND byte or word OR byte or word Exclusive OR byte or word Test byte or word Shifts ...
... mem / reg , CNT SHR / SAR mem / reg , CNT ROL mem / reg , CNT ROR mem / reg , CNT RCL mem / reg , CNT RCR mem / reg , CNT Logicals NOT byte or word AND byte or word OR byte or word Exclusive OR byte or word Test byte or word Shifts ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero