Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
Kitabın içinden
87 sonuçtan 1-3 arası sonuçlar
Sayfa 13
... output of a gate . It is expressed as a number . The output of a gate is normally connected to the inputs of other similar gates . Typical fan - out for ... output to work properly , a resistor Introduction to Digital Systems 13 TTL Outputs.
... output of a gate . It is expressed as a number . The output of a gate is normally connected to the inputs of other similar gates . Typical fan - out for ... output to work properly , a resistor Introduction to Digital Systems 13 TTL Outputs.
Sayfa 15
... output Let us briefly review the totem - pole output circuit shown in Figure 1.9 . The circuit operates as follows : When transistor Q1 is ON , transistor Q2 is OFF . When Q , is OFF , Q2 is ON . This is how the totem - pole output is ...
... output Let us briefly review the totem - pole output circuit shown in Figure 1.9 . The circuit operates as follows : When transistor Q1 is ON , transistor Q2 is OFF . When Q , is OFF , Q2 is ON . This is how the totem - pole output is ...
Sayfa 178
... outputs of the inverter # 2 and # 5 are 1 and 0 respectively . This means that the output of NOR gate # 3 is 0. This will produce a 1 at the output of NOR gate # 6 . Thus , the flip - flop is cleared to zero ( Q = 0 and Q = 1 ) . iv ...
... outputs of the inverter # 2 and # 5 are 1 and 0 respectively . This means that the output of NOR gate # 3 is 0. This will produce a 1 at the output of NOR gate # 6 . Thus , the flip - flop is cleared to zero ( Q = 0 and Q = 1 ) . iv ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
13 diğer bölüm gösterilmiyor
Sık kullanılan terimler ve kelime öbekleri
16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero