Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
Kitabın içinden
22 sonuçtan 1-3 arası sonuçlar
Sayfa 755
... Pipeline 11.8.1 Basic Concepts Assume a task T is carried out by performing four activities : Al , A2 , A3 , and A4 ... pipeline concept . A pipeline gains efficiency for the same reason as an assembly line does : Several activities are ...
... Pipeline 11.8.1 Basic Concepts Assume a task T is carried out by performing four activities : Al , A2 , A3 , and A4 ... pipeline concept . A pipeline gains efficiency for the same reason as an assembly line does : Several activities are ...
Sayfa 757
... Pipelines The pipeline concept can be used to build high - speed multipliers . Consider the multi- plication P = M * Q , where M and Q are 8 - bit numbers . The 16 - bit product P can be expressed as : 7 P = M ( q722 + q « 2 ° + qs23 + ...
... Pipelines The pipeline concept can be used to build high - speed multipliers . Consider the multi- plication P = M * Q , where M and Q are 8 - bit numbers . The 16 - bit product P can be expressed as : 7 P = M ( q722 + q « 2 ° + qs23 + ...
Sayfa 760
... Pipeline This process can be effectively carried out by using the pipeline shown in Figure 11.38 . As mentioned earlier , in such a pipelined scheme the first instruction requires five clocks to complete its execution . However , the ...
... Pipeline This process can be effectively carried out by using the pipeline shown in Figure 11.38 . As mentioned earlier , in such a pipelined scheme the first instruction requires five clocks to complete its execution . However , the ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
13 diğer bölüm gösterilmiyor
Sık kullanılan terimler ve kelime öbekleri
16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero