Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
Kitabın içinden
52 sonuçtan 1-3 arası sonuçlar
Sayfa 243
... pointer is incremented after a PUSH and decremented after a POP operation . On the other hand , when the stack is accessed from the top , the stack pointer is decremented after a PUSH and incremented after a POP . Microprocessors ...
... pointer is incremented after a PUSH and decremented after a POP operation . On the other hand , when the stack is accessed from the top , the stack pointer is decremented after a PUSH and incremented after a POP . Microprocessors ...
Sayfa 467
... pointer , the least significant byte of the code segment register , and the most significant byte of the code ... pointer onto the stack . The new CS and IP values are loaded . Flags TF and IF are then cleared to zero . The CS and IP ...
... pointer , the least significant byte of the code segment register , and the most significant byte of the code ... pointer onto the stack . The new CS and IP values are loaded . Flags TF and IF are then cleared to zero . The CS and IP ...
Sayfa 536
... pointer Other stack pointers Instructions available User Mode Recognition of a trap , reset , or interrupt Clearing status bit S User stack pointer Registers A0 - A6 Supervisor stack pointer User stack pointer and registers A0- A6 All ...
... pointer Other stack pointers Instructions available User Mode Recognition of a trap , reset , or interrupt Clearing status bit S User stack pointer Registers A0 - A6 Supervisor stack pointer User stack pointer and registers A0- A6 All ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
13 diğer bölüm gösterilmiyor
Sık kullanılan terimler ve kelime öbekleri
16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero