Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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77 sonuçtan 1-3 arası sonuçlar
Sayfa 82
... provides the value of the Boolean function as 1 or 0 for each combination of the input binary variables . Table 3.1 provides the truth table for the Boolean function f = AB + C . In the table , if A = 1 , B = 1 , and C = 0 , f = 0.0 + 0 ...
... provides the value of the Boolean function as 1 or 0 for each combination of the input binary variables . Table 3.1 provides the truth table for the Boolean function f = AB + C . In the table , if A = 1 , B = 1 , and C = 0 , f = 0.0 + 0 ...
Sayfa 390
... provides 2 times greater throughput than the standard 5 - MHz 8086/8088 . Both have integrated several new peripheral functional units , such as a DMA controller , a 16 - bit timer unit , and an interrupt controller unit , into a single ...
... provides 2 times greater throughput than the standard 5 - MHz 8086/8088 . Both have integrated several new peripheral functional units , such as a DMA controller , a 16 - bit timer unit , and an interrupt controller unit , into a single ...
Sayfa 503
... provides the basic timing for the 80386. This clock is then divided by 2 by the 80386 internally to provide the ... provides system clock and reset signals . Do - D31 provides the 32 - bit data bus . The 80386 can transfer 16- or 32 ...
... provides the basic timing for the 80386. This clock is then divided by 2 by the 80386 internally to provide the ... provides system clock and reset signals . Do - D31 provides the 32 - bit data bus . The 80386 can transfer 16- or 32 ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero