Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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3 sonuçtan 1-3 arası sonuçlar
Sayfa 286
... record of the program under development . After the application system software has been completely developed and debugged , it needs to be permanently stored for execution in the target hardware . The EPROM ( erasable / programmable ...
... record of the program under development . After the application system software has been completely developed and debugged , it needs to be permanently stored for execution in the target hardware . The EPROM ( erasable / programmable ...
Sayfa 800
... record . Indexed Addressing : The effective address of the instruction is determined by the sum of the 16 - bit address and the contents of the index register . Used to access arrays . Index Register : A register used to hold a value ...
... record . Indexed Addressing : The effective address of the instruction is determined by the sum of the 16 - bit address and the contents of the index register . Used to access arrays . Index Register : A register used to hold a value ...
Sayfa 810
... record of internal counter events is made to permit analysis ( debugging ) of the program's execution . Transistor : Electronic switch ; performs NOT ; current amplifier . Tristate Buffer : Has three output states : logic 0 , 1 , and a ...
... record of internal counter events is made to permit analysis ( debugging ) of the program's execution . Transistor : Electronic switch ; performs NOT ; current amplifier . Tristate Buffer : Has three output states : logic 0 , 1 , and a ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero