Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
Kitabın içinden
55 sonuçtan 1-3 arası sonuçlar
Sayfa 440
... Reset Signals When designing the microprocessor's reset circuit , two types of reset must be consid- ered : power - up reset and manual reset . These reset circuits must be designed using the parameters specified by the manufacturer ...
... Reset Signals When designing the microprocessor's reset circuit , two types of reset must be consid- ered : power - up reset and manual reset . These reset circuits must be designed using the parameters specified by the manufacturer ...
Sayfa 584
... RESET line of the 68000 is also bidirectional . To reset the 68000 , both the RESET and HALT pins must be LOW for 10 clock cycles at the same time except when Vcc is initially applied to the 68000. In this case , an external reset must ...
... RESET line of the 68000 is also bidirectional . To reset the 68000 , both the RESET and HALT pins must be LOW for 10 clock cycles at the same time except when Vcc is initially applied to the 68000. In this case , an external reset must ...
Sayfa 587
... reset when its Vcc pin is connected to power . This is called " power - up reset . " After some time during normal operation , the micro- processor can be reset by the designer upon activation of a manual switch such as a pushbut- ton . A ...
... reset when its Vcc pin is connected to power . This is called " power - up reset . " After some time during normal operation , the micro- processor can be reset by the designer upon activation of a manual switch such as a pushbut- ton . A ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
13 diğer bölüm gösterilmiyor
Sık kullanılan terimler ve kelime öbekleri
16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero