Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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80 sonuçtan 1-3 arası sonuçlar
Sayfa 200
... sequence . The following examples will illustrate the straight binary sequence and nonbinary sequence counters . Example 5.5 Design a two - bit counter to count in the sequence 00 , 01 , 10 , 11 , and repeat . Use T flip - flops ...
... sequence . The following examples will illustrate the straight binary sequence and nonbinary sequence counters . Example 5.5 Design a two - bit counter to count in the sequence 00 , 01 , 10 , 11 , and repeat . Use T flip - flops ...
Sayfa 226
... sequence counters using the type of flip - flop specified . Assume the unused states as don't cares . Your design must produce a self - correcting counter . Design a nonbinary sequence counter with the sequence 0 , 1 , 3 , 4 , 5 , 6 , 7 ...
... sequence counters using the type of flip - flop specified . Assume the unused states as don't cares . Your design must produce a self - correcting counter . Design a nonbinary sequence counter with the sequence 0 , 1 , 3 , 4 , 5 , 6 , 7 ...
Sayfa 524
... sequence : MOV SAHF AH , OFH What is the content of AL after execution of the following instruction sequence ? BH , 33H 9.9 MOV MOV AL , 32H ADD AL , BH ААА What happens after execution of the following instruction sequence ? Comment ...
... sequence : MOV SAHF AH , OFH What is the content of AL after execution of the following instruction sequence ? BH , 33H 9.9 MOV MOV AL , 32H ADD AL , BH ААА What happens after execution of the following instruction sequence ? Comment ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero