Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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Sayfa 486
... space includes a single array of up to 4 gigabytes . The 80386 maps the 4 - gigabyte space into the physical address space automatically by using an address - translation scheme transparent to the applications programmers . A segmented ...
... space includes a single array of up to 4 gigabytes . The 80386 maps the 4 - gigabyte space into the physical address space automatically by using an address - translation scheme transparent to the applications programmers . A segmented ...
Sayfa 487
Mohamed Rafiquzzaman. A segmented address space includes up to 16,383 linear address spaces of up to 4 gigabytes each . In a segmented model , the address space is called the " logical " address space and can be up to 64 terabytes . The ...
Mohamed Rafiquzzaman. A segmented address space includes up to 16,383 linear address spaces of up to 4 gigabytes each . In a segmented model , the address space is called the " logical " address space and can be up to 64 terabytes . The ...
Sayfa 746
... space to find the smallest free hole that can hold the incoming program . Therefore , it may be time - consuming ... space list ( ASL ) to indicate the free memory space . Typically , each entry in this list includes the following ...
... space to find the smallest free hole that can hold the incoming program . Therefore , it may be time - consuming ... space list ( ASL ) to indicate the free memory space . Typically , each entry in this list includes the following ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero