Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
Kitabın içinden
31 sonuçtan 1-3 arası sonuçlar
Sayfa 243
... stack pointer is incremented after a PUSH and decremented after a POP operation . On the other hand , when the stack is accessed from the top , the stack pointer is decremented after a PUSH and incremented after a POP . Microprocessors ...
... stack pointer is incremented after a PUSH and decremented after a POP operation . On the other hand , when the stack is accessed from the top , the stack pointer is decremented after a PUSH and incremented after a POP . Microprocessors ...
Sayfa 398
... stack pointer while SP is the system stack pointer . This is because SP is used by some 8086 instructions ( such as CALL subroutine ) automatically . The based addressing mode with BP is a very convenient way to access stack data . BP ...
... stack pointer while SP is the system stack pointer . This is because SP is used by some 8086 instructions ( such as CALL subroutine ) automatically . The based addressing mode with BP is a very convenient way to access stack data . BP ...
Sayfa 568
... stack growing from HIGH to LOW memory addresses in which A5 is used as the stack pointer : 23 0 A5 20050416 Stack 20050416 Top 20050616 Data 2 20050816 Data 1 20050A16 Data 0 20050C16 Bottom To push the 16 - bit contents 050416 of ...
... stack growing from HIGH to LOW memory addresses in which A5 is used as the stack pointer : 23 0 A5 20050416 Stack 20050416 Top 20050616 Data 2 20050816 Data 1 20050A16 Data 0 20050C16 Bottom To push the 16 - bit contents 050416 of ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
13 diğer bölüm gösterilmiyor
Sık kullanılan terimler ve kelime öbekleri
16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero