Fundamentals of Digital Logic and Microcomputer DesignRafi Systems, Incorporated, 1999 - 828 sayfa |
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Sayfa 350
... stored data serially . Hence , they are significantly slower than the main memory . Popular secondary memories include hard disk and floppy disk systems . Data are stored on the disks in files . Note that the floppy disk is removable ...
... stored data serially . Hence , they are significantly slower than the main memory . Popular secondary memories include hard disk and floppy disk systems . Data are stored on the disks in files . Note that the floppy disk is removable ...
Sayfa 365
... stored in the cache . The concept of set - associative mapping can be illus- trated by a numerical example as shown in Figure 8.15 . Assume that all numbers are in hexadecimal . Each cache word can store two or more memory words under ...
... stored in the cache . The concept of set - associative mapping can be illus- trated by a numerical example as shown in Figure 8.15 . Assume that all numbers are in hexadecimal . Each cache word can store two or more memory words under ...
Sayfa 686
... stored starting at $ 502030 . The second string is stored at location $ 302510 . The ASCII character in location $ 502030 of string 1 will be compared with the ASCII character in location $ 302510 of string 2 , [ $ 502031 ] will be ...
... stored starting at $ 502030 . The second string is stored at location $ 302510 . The ASCII character in location $ 502030 of string 1 will be compared with the ASCII character in location $ 302510 of string 2 , [ $ 502031 ] will be ...
İçindekiler
INTRODUCTION TO DIGITAL SYSTEMS | 1 |
NUMBER SYSTEMS AND CODES | 31 |
BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES | 67 |
Telif Hakkı | |
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16 bits 32 bits adder address register addressing modes arithmetic assembly language assembly language program Assume binary number block Boolean bus cycle byte cache chip clock cycle complement consider contains contents control unit data bus decimal decoder digits display DSACK1 DTACK EPROM example execution flags flip-flop floating-point full adder function hardware hexadecimal implemented index register input instruction set integer Intel interface interrupt K-map latch loaded logic diagram m₁ main memory memory address memory location microcomputer microprocessor microprogram minterms Motorola MOVE.W multiplication offset on-chip op-code operand output Pentium perform physical address pins pipeline pointer port PowerPC processor program counter provides reset result RISC sequence sequential circuit shown in Figure signal specified stack stored subroutine synchronous transistor truth table typical unsigned vector word zero